Chiplets Architecture 2021
July 13-14, 2021 – Online
The concept of “Chiplets” – integrating multiple die smaller than complete “stand alone” semiconductor devices using advanced packaging – has firmly captured the attention of the semiconductor industry. The foundational technologies to enable this advanced packaging have been explored in detailed at industry events. MEPTEC through a series of events will cover the practical aspects of designing, implementing (packaging), and testing Chiplets as this cross-functional knowledge is critical to transitioning such devices from science projects to commercial reality.
Join us as we focus on the high-level decisions that need to be made to implement a product using a Chiplet approach.
Supply Chain Security 2021
April 28-29, 2021 – Online
As the electronic content and complexity increases in all types of products it is essential to have a secure supply chain. The safety and security of these products rely directly on the semiconductor devices inside performing exactly as designed. The Supply Chain Security virtual workshop will explore the cross-functional issues facing packaging, test, and design engineers to ensure what is delivered contains the properly functioning original design and nothing more.
Join us to learn from experts in the commercial, military, and academic domains about Supply Chain Security.
Too Hot to Test 2021
February 9-11, 2021 – Online
As the industry moves to develop creative artificial intelligence (AI) and other advanced computing devices, the power consumption per semiconductor device has skyrocketed. This brings with it challenges in power deliver as well as device cooling. The virtual workshop Too Hot to Test will explore the cross-functional challenges associated with testing high-power devices. The focus will be on chips, die stacks, and multi-chip modules from both a thermal and power perspective.
Join us to learn what is possible and when a device really becomes Too Hot to Test!
Known Good Die Workshop 2020
September 16 – 18, 2020 – 20th annual
With the demise of Moore’s Law due to the economics of advanced semiconductor process nodes, the demand for greater cost performance and differentiation has fueled the development of advanced packaging. Having Known Good Die (KGD) is essential for many, if not all, of the current ‘crop’ of advanced semiconductor packaging.
Join us at the Known Good Die Workshop for a cross-functional view of challenges and solutions for achieving KGD!